- Switch 2 variable's content without temporary variable. - Create an array with all the numbers from 0 to Size - 1 in random order and without duplicates.
Verification Interview Questions
3,649 verification interview questions shared by candidates
Draw out the circuit simple verilog code would synthesize to
Basic CMOS Physical design related Sta Tool related
difference shallow copy and deep copy
write a code,a task to fill an array[x][y] ?
What is polymorphism, how is it different from inheritance, give an example usage of polymorphism in Systemverilog testbench generation.
Question on Project, tool awareness, uvm methodology, driver code and testplan development.
1. constraints 2. assertions 3. UVM topology
The most unexpected question was about prior negative job experiences and how I reacted to them. Since I had had several such experiences during 21 years of being a pharmacist, this question was not difficult to answer.
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