Describes one of your projects
Verification Design Engineer Interview Questions
1,116 verification design engineer interview questions shared by candidates
Write TB for one of the projects from past experience . Describe its features and implement DUT interface connections and build TB on whiteboard .
DV related, protocols, sv, uvm, axi,abp
Cache Coherency, UVM and TLM related, SV concepts, Past projects.
They asked about uvm fundamentals. They were looking for strong uvm experience and asked me to write code for scoreboard, monitor and asked about how to connect them.
Explain how an out-of-order processor works? How do you implement register renaming? Difference between an architectural and physical register file
difference of Union and Struct (C++). VIPT cache.
design an electrical circuit with switches, voltage source for a particular application- wasn't expecting one since my area of expertise is mostly digital
2 signals, both only toggle once. At the first rising edge, start testbench; At the second falling edge, stop testbench. How?
Memory Consistency
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