Node insertion in linked list. Fibonacci series function, hardware to generate Fibonacci series, prime number generation hardware , STA concepts, clock domain crossing, use of synchronizes, skew and setup hold time violation.
Asic Engineer Interview Questions
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pass by value, pass by ref, function in c for fibonacci, pattern detector fsm, pipeline hazard
one question they asked is same as online test question and one verilog question and puzzle question.
some kind of high speed protocol and aske me to desgin in verilog
Scripting questions on 2D hashes and asked for coding in perl/python. Basic questions on STA
Q.There was a discussion on mealy and moore machine.
And gate using transmission gate
I don't remember the question clearly but something that had to do with implementing some methods in a (UVM-like) Scoreboard class.
The first interview asked basic technical questions about logic design, STA and FSM etc. The second one was RTL coding for synchronous FIFO with depth=5
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