Firstly there is a written exam including questions from digital analog and verilog and SV, two technical interviews mainly based on verilog, SV and UVM, and your projects and one HR round
Interview questions [1]
Question 1
Questions based on digital are from FSM and flip flops,
From verilog there are questions based on always initial block, blocking and non blocking assignments, and data types
From Systemverilog there are questions from data types, array, OOPS concept
a structured conversation where one participant asks questions, and the other provides answers. Interviews almost always involve spoken conversation between two or more parties. In some instances a "conversation" can happen between two persons who type their questions and answers.
I applied online. The process took 2 months. I interviewed at Micron Technology (Boise, ID) in Jul 2021
Interview
The interviews (six total) were conducted via Zoom, each being one-on-one and lasting an hour.
It was a mix of technical questions about CMOS circuit questions and logic gates, and explaining some aspects of my current role within the company.
Interview questions [12]
Question 1
How do you construct a NOR gate only from NAND gates?
There's a circuit diagram of two parallel capacitors with different charge voltages, connected by a transistor.
What happens to those two voltages when the transistor turns on?
There's a circuit diagram of a pulse generator: a 2-input NAND gate with one of the inputs three inverters downstream from the other input, with some propagation delay for each inverter.
Given the timing diagram of the input, what does the output look like?