Questions regarding STA mode and Transactor based Simulation Acceleration: How would you implement a transactor? Use SystemC or System Verilog and why? How will you communicate between the DUT and the transactor testbench? Explain the PCIe speedbridge interface and how would you debug it?
technical interview first, then HR interview
Explain the I2C protocol
Describe the testbench you created for a particular project
Few questions on LDO and Bandgap reference
Single ended CMOS based differential amplifier operation Mark inverting and non inverting terminals Derive expression for gain and output resistance and it's poles and zeros
Q: What is the use of the factory in UVM?
Basic electronics question - 2:1 Mux, truthtable, DFF, FPGA design flow
Draw the IDD diagram (current as a function of time) of an inverter when the input switches from OFF to ON.
Does Latch have a concept of setup and hold time. If yes explain. If no Explain.
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