To describe my previous work experience
Verification Engineer Interview Questions
3,654 verification engineer interview questions shared by candidates
What are the components used in an additional circuit?
Define performance?
Identify stress concentrations on a PCB
setup time, hold time, fifo, design of async/synch fifo
Interesting question about memory aliasing. You've two APIs write(addr, data) and read(addr, &data) just using these two APIs write an algorithm to identify one of the internal signals that has been shorted. You've no access to internal signals or the interface signals (black box verification)
Calculate fifo depth for following data rate Writing Data = 80 DATA/100 Clock (Randomization of 20 Data’s) Outgoing Data= 8 DATA/10 Clock. Burst size = 160
About work experience, Implement randc using rand, SV questions, Verilog design question, Fifo depth question, Scoreboard implementation of a design, MESI, Linked list traversing question. Looks like they need C++ even if the position requires SV/UVM only.
1. Int func(){ Int a = 1; a++; Return a; } You have two threads, both call the func function, one thread stops after the 'a++' line and after a context switch the other thread stops after the 'int a = 1' line. what is the value of 'a'?
Linked List traversal, Fibonacci algorithm (basic and recursive), the difference in complexity between the basic and recursive. Relatively straight forward. Second phone screen: "A person on a stairway needs to get from the bottom of the stairs to the top in the minimum number of steps, no, how possible combinations of steps, no, I don't think I explained that well...what if they took could only take one step forward for every"...really? is this even a real question? somehow the answer was yet again a Fibonacci sequence question. Next was reversing a singly linked list - oops, you can't use any references (!?), or another linked list.. Frustrating to have gotten the "B" team interviewer
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