How to write an assertion in SystemVerilog
Verification Engineer Interview Questions
3,654 verification engineer interview questions shared by candidates
What is a hardstuck bug you have encountered during a project?
If your constraint block includes values like 0, 1, 4, and 300 to 400, how would you handle that in coverage?
Did you have any metrics or standards that your phone calls were judged on?
Questions on Verilog and SV coding
What is the lead generation?
Difference between validation and verification testing
General digital design and programming questions
About op amp operation and MOSFET
Question was project related. I had used a 47k ohm resistor in one of the feedback circuits of my project. They asked by I used that particular feedback, and I were given a different rating then what changes would I need to make in the circuit
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