Confidential. But related to system verilog and uvm.
Verification Design Engineer Interview Questions
1,116 verification design engineer interview questions shared by candidates
Since the interview was for a hardware position, they asked more software related questions than I expected but were all easy
How do you increase processor speed.
Basic Pipeline questions focused mainly on Branch Prediction and BTB
design a vending machine from architecture to rtl..
Describe your previous projects and describe your contribution in them
bitmasking using systemverilog C++ classes
I don't remember the question clearly but something that had to do with implementing some methods in a (UVM-like) Scoreboard class.
All questions were related to my previous experience, testing methodology, and problem solving skills. They also asked some basic oo concepts
Verilog code for the clock divider
Viewing 871 - 880 interview questions
See Interview Questions for Similar Jobs
Fpga Design EngineerVerification EngineerRtl Design EngineerVlsi Design EngineerLogic Design EngineerPhysical Design EngineerCpu Design EngineerElectrical Product Design EngineerSenior Vlsi Design EngineerSenior Fpga Design EngineerVerification ManagerSenior Asic Fpga Design EngineerApplication Design EngineerHardware Design EngineerSenior Physical Design EngineerIc Design EngineerFpga Development EngineerAsic Verification Engineer