implement XOR using NANDs Setup and Hold Timing constraints
Physical Design Engineer Interview Questions
711 physical design engineer interview questions shared by candidates
fundamental questions and design questions.
Explain the gate level design of a flipflop. Explain why are we using master-slave configuration?
they ask the inputs into the tools for different steps of physical design.
Setup time vs hold time/how to fix?
What if the gap between the macros increases in the floor placement..?
Questions on Level Shifters, clock domain crossing scenarios with logic circuits .
How is uncertainty determined.
Asked setup/hold time violation and how to fix
basic cmos circuits and power consumptions
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