Basic RTL questions on FSMs, full VLSI flow from synthesis to gds, clock gating, SRAM internal circuits, STA timing questions, inverter and buffer characteristics, low power methodologies, NAND gate implementation of gates and timing and layout
Hardware Development Engineer Interview Questions
5,134 hardware development engineer interview questions shared by candidates
fundamentals of cmos VLSI hardware design.
Do you have any leadership experience
Name 10 design criteria that you used in the hardware developments
No difficult questions and no unexpected questions.
Phone inetrview , they majorly targeted my resume (Skills , projects, previous work experience). Did ask a few logic design questions setup hold, nand gate etc. Onsite was not that bad asked on Sync/Asyns FIFO design (had to write verilog code- explain corner cases), state machines (detect a sequence), 4-5 Puzzels, Verilog questions.
Difficult question was, describing the flow of a 64 bit MIPS
Wanted to discuss dynamic memory allocation.
Network protocol questions
VHDL
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