Most of the things were on ARM architecture, AMBA protocols, SV and UVM, Design concepts and Analytical skills
Design Verification Interview Questions
1,115 design verification interview questions shared by candidates
how would you code an adder in verilog
Tell me about your CV. Why do you want to work for us? Why do you want an internship and not a job?
SV and UVM related questions and ur understanding
what value the interviewee could supply to the company?
I was asked questions on the course projects that I have done.
Q: SystemVerilog syntax questions Q: Design a clock in verilog without any existing clock signals Q: Some flip-flop/latch design questions at clock-domain crossing.
what did u understand about this Role?
Questions on Digital electronics, CMOS, Physical Design and LVS
Code C++ - to print Fibonacci series using C++
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